After gaining initial product success with nSPEC, Nanotronics Imaging has introduced new capabilities to provide a more complete semiconductor inspection system. nSPEC now detects and categorizes defects on semiconductor wafers after photolithographic patterning and other chip processing steps. nSPEC has already been proven highly effective for inspection of blank wafers (substrates and epitaxial) across a full range of compound semiconductor materials: SiC, GaN, GaAs, InP etc. The patterned wafer inspection feature makes nSPEC a unique tool with unparalleled capability to track wafer quality through the whole chip manufacturing process from bare substrate all the way to fully processed devices.

Software has been developed in collaboration with Microsemi Corp. of Aliso Viejo, CA and supported by funding from US Air Force. Bruce Odekirk, SiC Program Director at the Microsemi manufacturing facility in Bend, Oregon, commented: We have been early adopters of nSPEC for SiC epitaxial wafer inspection, and our first Nanotronics tool has been producing highly informative data for over a year. Now we are delighted to extend its ability to monitor and improve our post-epi chip processing with equally great performance and cost-effectiveness.

Ivan Eliashevich, VP at Nanotronics Imaging, added: nSPECs versatility in image acquisition and state-of-the-art data processing power allow us to deliver exceptionally broad range of testing capabilities by adding new software-driven features to existing tool platforms. Instead of bearing the expense of buying multiple tools, dealing with data compatibility issues etc., customers now can have multiple functions seamlessly combined in one affordable machine.

Commercial release of the patterned wafer inspection software for new and existing nSPEC systems is expected in Q1 2013, it is currently available for evaluation as a beta version.